rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a ADP3342 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ?analog devices, inc., 2002 ultralow, i q , anycap low dropout regulator features accuracy over line and load: 4.0% @ 25 c, 5% over temperature ultralow dropout voltage: 300 mv (typ) @ 300 ma requires only c o = 1.0 f for stability anycap = stable with any type of capacitor (including mlcc) current and thermal limiting low shutdown current: < 2 a 1.7 v < v in < 6 v 2.8 v < vcc < 6 v v out = 1.2 v 5% ?0 c to +100 c ambient temperature range ultrasmall thermally enhanced 8-lead msop package applications notebook pcs desktop pcs general description the ADP3342 is a unique member of the adp330x family of precision low dropout anycap voltage regulators. the ADP3342 operates with an input voltage range of 1.7 v to 6 v and delivers a continuous load current up to 300 ma. in order to support the ability to regulate from such a low input voltage, the power rail to the ic, vcc, has been split off from the main power rail, v in , from which the output is powered. the ADP3342 stands out from the conventional ldos with the lowest thermal resistance of any msop-8 package and an enhanced process that enables it to offer performance advantages beyond its competition. its patented design requires only a 1.0 m f output capacitor for stability. this device is insensitive to output capacitor equivalent series resistance (esr) and is stable with any good quality capacitor, including ceramic (mlcc) types for space- restricted applications. the dropout voltage of the ADP3342 is only 190 mv (typical) at 300 ma. this device also includes a safety current limit, thermal overload protection, and a shutdown control pin. functional block diagram thermal protection cc in ADP3342 out gnd q1 g m band gap + ref driver vcc pwrgd sd + vcc in in sd out out pwrgd gnd ADP3342 + on off 1 f v in 1.8v 1 f v out 1.2v 3.3v figure 1. typical application circuit anycap is a registered trademark of analog devices, inc.
rev. a e2e ADP3342especifications 1 (vcc = 3.0 v, v in = 1.8 v, c in = c out = 1 f, t a = 0 c to +100 c and t a = e40 c to +100 c, unless otherwise noted.) parameter symbol conditions min typ max unit output voltage accuracy v out vcc = 2.8 v to 6 v, v in = 1.7 v to 6 v C C C C C C C sd d dd sd d s
rev. a ADP3342 e3e pin configuration top view (not to scale) 8 7 6 5 1 2 3 4 vcc out nc gnd nc ADP3342 sd pwrgd in pin function descriptions pin no. mnemonic function 1, 8 nc no connection 2 out output of the regulator. bypass to ground with a 1.0 m f or larger capacitor. all pins must be connected together for proper operation. 3 vcc supply voltage 4 gnd ground pin 5p wrgd power good. used to indicate that output is in regulation. 6 sd s sd dsd sd sdssd ss s C C C C ja (2-layer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 ja (4-layer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 jc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 C C
rev. a ADP3342 e4e input voltage e v output voltage e v 1.7 2.7 3.7 4.7 5.7 1.17 1.18 1.19 1.20 1.21 1.22 1.23 1.24 1.25 v out = 1.2v v cc = 3v i l = 100ma i l = 300ma i l = 200ma i l = 0ma tpc 1. line regulation output voltage vs. supply voltage output load e ma ground current e ma 3.5 0 50 100 150 200 250 300 3.0 2.5 2.0 1.5 1.0 0 0.5 v in = 1.8v v cc = 3.0v tpc 4. ground current vs. load current output load e ma input-output voltage e v 0.25 0 50 100 200 250 150 300 0.20 0.15 0.10 0.05 0 tpc 7. dropout voltage vs. output current et ypical performance characteristics output load e ma output voltage e v 0 50 100 150 200 250 300 1.23 1.22 1.21 1.20 1.19 1.18 1.17 v in = 1.8v v cc = 3.0v tpc 2. output voltage vs. load current junction temperature e c output channel e % 1.0 0.3 e50 e25 150 0255 075 100 125 0.9 0.7 0.6 0.5 0.4 0.8 0.2 0.1 0 e0.1 e0.2 e0.3 e0.4 0 200ma 300ma tpc 5. output voltage variation vs. junction temperature temperature e c ground current @ 300ma load e ma 7.0 6.5 6.0 5.5 5.0 4.5 e40 e25 e10 5 20 35 50 65 80 0 4.0 3.5 3.0 2.5 2.0 1.5 1.0 v cc = 3.0v v in = 1.8v 95 max typ min tpc 8. ground current @ 300 ma load vs. ambient temperature input voltage e v ground current e a 120 110 100 90 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0 80 70 60 50 v out = 1.2v v cc = 3v i l = 0 a tpc 3. ground current vs. supply voltage junction temperature e c ground current e ma 5.50 e40 e20 0 20 4 06080100 5.00 4.50 4.00 3.50 3.00 2.50 2.00 1.50 1.00 0.50 0 v cc = 3.0v v in = 1.8v i l = 0ma i l = 100ma i l = 200ma i l = 300ma tpc 6. ground current vs. junction temperature time e s 200 400 600 800 v out = 1.2v sd = v in r l = 4 input/output voltage e v 4 3 2 1 0 0 1000 e1 e2 5 6 tpc 9. power-up/power-down
rev. a e5e ADP3342 time e s 40 80 120 160 1.32 1.22 1.12 3.00 1.80 v cc = 3v c l = 1 f r l = 4 v in e v v out e v 0 200 tpc 10. line transient response time e s 400 1200 800 1.3 1.2 1.1 200 5 v cc = 3v v in = 1.8v c l = 10 f 400 0 ma 0 1600 2000 v tpc 13. load transient response time e s 100 200 300 400 2.0 1.0 0 3.0 0 1.8 0 v cc = 3v v in = 1.8v r l = 4 sd e v output e v pwrgd e v 0 500 tpc 16. turn on delay time e s 40 80 120 160 1.32 1.22 1.12 3.00 1.80 v cc = 3v c l = 10 f r l = 4 v in e v v out e v 0 200 tpc 11. line transient response time e s 200 400 600 800 1.2 0 1.0 0.5 0 v in = 1.8v a 0 1000 v tpc 14. short circuit current time e s 6101418 2.0 1.0 0 3.0 0 1.8 0 v cc = 3v v in = 1.8v r l = 4 2 sd e v output e v pwrgd e v tpc 17. turn off delay time e s 400 1200 800 1.3 1.2 1.1 200 5 v cc = 3v v in = 1.8v c l = 1 f 400 0 ma 0 1600 2000 v tpc 12. load transient response time e s 200 600 1000 1400 2.0 1.0 0 3.0 0 1.8 0 v cc = 3v r l = 4 v in = 1.8v sd e v output e v pwrgd e v e200 1800 tpc 15. power-on/power-off response from shutdown time e s 200 600 1000 1400 2.0 1.0 0 3.0 0 v cc e v output e v v in = 1.8v sd = 3.0v r l = 4 1800 tpc 18. power on/power off response from v cc
rev. a ADP3342 e6e time e s 200 400 600 800 1.2 0 3.0 0 1.8 0 v in = 1.8v sd = 3.0v r l = 4 v in e v output e v pwrgd e v 0 1000 tpc 19. power on/power off response from v in frequency e hz voltage noise spectral density e v/ hz 100 10 10 1 0.1 0.01 0.001 100 1k 10k 100k 1m c l = 10 f c l = 1 f v out = 1.2v i l = 1ma tpc 22. output noise density time e ms 5253545 3.6 3.0 400 200 0 v in = 1.8v sd = 3v 15 v cc e v ma tpc 25. current limiting from v cc frequency e hz ripple rejection e db 10 100 1k 10k 100k 1m 10m e20 e30 e40 e50 e60 e70 e80 e90 v out = 1.2v c l = 1 f i l = 50 a c l = 1 f i l = 300ma c l = 10 f i l = 300ma c l = 10 f i l = 50 a tpc 20. power supply ripple rejection ambient temperature e c output voltage e v 1.25 1.23 1.21 1.19 1.17 1.15 0ma 50ma 100ma 200ma 300ma 35 55 75 95 115 135 155 175 tpc 23. thermal protection c l e f rms noise e v 70 0 10 20 30 40 50 60 50 40 20 10 0 30 300ma 0ma tpc 21. rms noise vs. c l (10 hze100 hz) v in e v 1.5 1.7 1.8 2.0 650 600 550 500 1.6 i cl e ma 1.9 tpc 24. current limit vs. v in
rev. a ADP3342 e7e theory of operation the new anycap ldo ADP3342 uses a single control loop for regulation and reference functions. the output voltage is sensed by a resistive voltage divider consisting of r1 and r2. feedback is taken from this network by way of a series diode (d1) and a second resistor divider (r3 and r4) to the input of an amplifier. ptat v os noninverting wideband driver input q1 ADP3342 compensation capacitor attenuation (v bandgap /v out ) r1 d1 r2 r3 r4 output ptat current (a) c load r load gnd g m vcc figure 2. control loop functional block diagram a very high gain error amplifier is used to control this loop. the amplifier is constructed in such a way that at equilibrium it produces a large, temperature proportional input sd sd d s
rev. a ? c02712? 10 /02(a) printed in u.s.a. ADP3342 to a safe level. the output current is restored when the die tem- perature is reduced. current and thermal limit protections are intended to protect the device against accidental overload conditions. for normal operation, device power dissipation should be limited by operating conditions so that junction temperatures will not exceed 150 c. calculating junction temperature device power dissipation is calculated as follows: pv v i vi di n out load in gnd = () + () ? where i load and i gnd are load current and ground current, and v in and v out are input and output voltages, respectively. outline dimensions 8-lead msop package [msop] (rm-8) dimensions shown in millimeters 0.23 0.08 0.80 0.40 8 0 85 4 1 4.90 bsc pin 1 0.65 bsc 3.00 bsc seating plane 0.15 0.00 0.38 0.22 1.10 max 3.00 bsc compliant to jedec standards mo-187aa coplanarity 0.10 assuming i load = 300 ma, i gnd = 4 ma, v in = 1.8 v, and v out = 1.2 v, device power dissipation is: p d =? + = (. .) (.) 18 12 300 18 4 187 ma ma mw the proprietary package used in the ADP3342 has a thermal resistance of 110 c/w, significantly lower than a standard msop-8 package. assuming a 4-layer board, the junction tem- perature rise above ambient temperature will be approximately equal to: ? twcwc a j == 0 187 110 20 6 .. revision history location page 10/02?ata sheet changed from rev. 0 to rev. a. changes to pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 changes to pin function description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 outline dimensions updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
|
